Low power in-memory implementation of ternary neural networks with resistive RAM-based synapse

Published in AICAS, 2020

Recommended citation: Laborieux, A., Bocquet, M., Hirtzlin, T., Klein, J. O., Diez, L. H., Nowak, E., Vianello, E., Portal, J.-M., & Querlioz, D. https://ieeexplore.ieee.org/abstract/document/9073877/